English: The read operation samples the output of the register stage chosen by the read pointer (=multiplexer). The multiplexer is driven by the up and down counting of the write clock pulses minus the read clock pulses. The pointer jumps between adjacent stages every time one of the two clocks changes the counter, but as long as the time difference between corresponding pulses of the two clocks is constant, the pointer is always placed on the same stage of the shift register when the reading takes place. If the write clock is faster, sooner or later it gives one more increment to the counter, and the reading takes place in the next stage (positive justification). If the read clock is faster, sooner or later it gives one more decrement to the counter, and the reading takes place in the previous stage (negative justification).
When the end of the register is exceeded, a slip takes place and the counter is corrected (for instance to its mid point, or just slipping one step to come back within range, or..).
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