File:CLB Block Diagram.png
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This file was moved to Wikimedia Commons from en.wikibooks using a bot script. All source information is still present. It requires review. Additionally, there may be errors in any or all of the information fields; information on this file should not be considered reliable and the file should not be used until it has been reviewed and any needed corrections have been made. Once the review has been completed, this template should be removed. For details about this file, see below. Check now! |
Summary
| Description |
English: Configurable Logic block for an FPGA |
| Date | 3 November 2007 (original upload date) |
| Source | Transferred from en.wikibooks to Commons. |
| Author | Ldvbin at English Wikibooks |
Licensing
Ldvbin at English Wikibooks, the copyright holder of this work, hereby publishes it under the following licenses:
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Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled GNU Free Documentation License. |
This file is licensed under the Creative Commons Attribution-Share Alike 3.0 Unported, 2.5 Generic, 2.0 Generic and 1.0 Generic license.
Attribution: Ldvbin at English Wikibooks
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Original upload log
The original description page was here. All following user names refer to en.wikibooks.
| Date/Time | Dimensions | User | Comment |
|---|---|---|---|
| 2007-11-03 20:34 | 344×217× (6442 bytes) | Ldvbin | |
| 2007-11-03 20:33 | 74×62× (497 bytes) | Ldvbin | Configurable Logic block for an FPGA |
File history
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 14:16, 19 August 2017 | | 344 × 217 (6 KB) | JackPotte | {{BotMoveToCommons|en.wikibooks|year={{subst:CURRENTYEAR}}|month={{subst:CURRENTMONTHNAME}}|day={{subst:CURRENTDAY}}}} == {{int:filedesc}} == {{Information |Description={{en|Configurable Logic block for an FPGA}} |Source={{transferred from|en.wikibooks... |
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