File:Schematic of PLL 2nd order.png
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Summary
| Description |
English: Simple Block Diagram of a 2nd order PLL, with indication of the gain of each block |
| Date | |
| Source | Own work |
| Author | BORGATO Pierandrea |
Licensing
I, the copyright holder of this work, hereby publish it under the following license:
This file is licensed under the Creative Commons Attribution-Share Alike 3.0 Unported license.
- You are free:
- to share – to copy, distribute and transmit the work
- to remix – to adapt the work
- Under the following conditions:
- attribution – You must give appropriate credit, provide a link to the license, and indicate if changes were made. You may do so in any reasonable manner, but not in any way that suggests the licensor endorses you or your use.
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} BORGATO Pierandrea (talk) 22:10, 9 October 2011 (UTC)
File history
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 22:09, 9 October 2011 | | 498 × 368 (18 KB) | BORGATO Pierandrea | Two changes: first the addition of the 2-2 architecture to the previous 2-1; second the use of a symbol for the flat gain of the loop filters that is consistent with the book where this figure is meant to fit. |
| 19:52, 18 August 2010 |  | 665 × 268 (11 KB) | BORGATO Pierandrea | {{Information |Description={{en|1=Simple Block Diagram of a 2nd order PLL, with indication of the gain of each block}} |Source=my own work |Author=BORGATO Pierandrea |Date=2010 08 18 |Permission= |other_versions= }} Category:Phase-locked loops |
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