English: The loop architecture of a Phase Locked Loop inside a CDR is defined by its order and type number as long as the loop can be considered a linear system (also because these loops are all of the unity feedback type). If one or two blocks -as is often the case in practice- of the loop exhibit hard non-linearities, still the two numbers can be used to identify the architecture. The loop behaviour is still understandable using the model of its linear model, and the different architectural subsets are still well non-overlapping when practically-case non linearities are present. The three cases to consider are identified as 1-1 , 2-1 and 2-2 depending on the characteristics of the middle forward block (that is essential linear in all real applications).