Signetics 2650 & 2636 programming/Tutorial code - State machine
Tutorial code - State machine
[edit | edit source]This is the code for the tutorial Indexed branching - creating a state machine
 | This code block must be merged with the standard 'Hardware definitions' code before it can be assembled |
; Tutorial State machine
;=============================================================================
SquareState equ $1F0E ;variable indicates state of the Square operation
TriangleState equ $1F0F ;variable indicates state of the Triangle operation
org 0
reset_vector: ; the microprocessor starts here when the reset button is pressed
bcta,un reset
org 3
interrupt_vector: ; interrupts shouldn't happen, but we set this just in case
retc,un
reset:
lodi,r0 $20 ; initialise program status word
lpsu ; inhibit interrupts, stack pointer=0
lodi,r0 $02
lpsl ; register bank 0, without carry, logical compare
eorz r0
stra,r0 effects ;initialise the 74LS378
stra,r0 objectsize ;all objects size 0
bsta,un DefineObjects ;define all objects
lodi,r0 $AA
stra,r0 score12
stra,r0 score34
eorz r0
stra,r0 effects ; !invert = 0
lodi,r0 0 ; X / 000 / 0 / 000
stra,r0 backgnd ; / black background / disabled / yellow screen
lodi,r0 %00011101 ; XX / 011 / 101
stra,r0 colours12 ; / obj1 red / obj2 green
lodi,r0 40 ;set initial position of two objects
stra,r0 hc1
stra,r0 hc2
stra,r0 vc1
stra,r0 vc2
lodi,r0 0
stra,r0 SquareState
lodi,r0 0
stra,r0 TriangleState
endless:
bsta,un Vsync0 ; make sure VRST hasn't started
bsta,un Vsync1 ; wait for VRST to start
loda,r3 SquareState ; go and make one movement in the Square state-machine
bsxa squareLUT,r3
loda,r3 TriangleState ; go and make one movement in the Triangle state-machine
bsxa triangleLUT,r3
bctr,un endless ; repeat endlessly
;===========================================================================================
; Define the Square state-machine
squareLUT: ; look up table connecting index to subroutine
bcta,un squaretop ; 0
bcta,un squareright ; 3
bcta,un squarebottom ; 6
bcta,un squareleft ; 9
squaretop:
loda,r0 hc1 ; move object 1 right
addi,r0 1
stra,r0 hc1
comi,r0 150
retc,lt ; if reached endpoint
lodi,r0 3
stra,r0 SquareState ; change state to move down
retc,un
squareright:
loda,r0 vc1 ; move object 1 down
addi,r0 1
stra,r0 vc1
comi,r0 120
retc,lt ; if reached endpoint
lodi,r0 6
stra,r0 SquareState ; change state to move left
retc,un
squarebottom:
loda,r0 hc1 ; move object 1 left
subi,r0 1
stra,r0 hc1
comi,r0 40
retc,gt ; if reached endpoint
lodi,r0 9
stra,r0 SquareState ; change state to move up
retc,un
squareleft:
loda,r0 vc1 ; move object 1 up
subi,r0 1
stra,r0 vc1
comi,r0 40
retc,gt ; if reached endpoint
lodi,r0 0
stra,r0 SquareState ; change state to move right
retc,un
;===========================================================================================
; Define the Triangle state-machine
triangleLUT:
bcta,un triangleleft ; 0
bcta,un trianglebottom ; 3
bcta,un trianglehypo ; 6
triangleleft:
loda,r0 vc2 ; move object 2 down
addi,r0 1
stra,r0 vc2
comi,r0 140
retc,lt ; if reached endpoint
lodi,r0 3
stra,r0 TriangleState ; change state
retc,un
trianglebottom:
loda,r0 hc2 ; move object 2 right
addi,r0 1
stra,r0 hc2
comi,r0 140
retc,lt ; if reached endpoint
lodi,r0 6
stra,r0 TriangleState ; change state
retc,un
trianglehypo:
loda,r0 hc2 ; move object 2 left
subi,r0 1
stra,r0 hc2
loda,r0 vc2 ; move object 2 up
subi,r0 1
stra,r0 vc2
comi,r0 40
retc,gt ; if reached endpoint
lodi,r0 0
stra,r0 TriangleState ; change state
retc,un
;===================================================================
; subroutine - define shapes and position of all objects
DefineObjects:
lodi,r3 $0E
lodi,r0 $FF
loopDS:
stra,r0 shape1,r3- ; create rectangular shapes
stra,r0 shape2,r3
stra,r0 shape3,r3
stra,r0 shape4,r3
brnr,r3 loopDS
retc,un
;=================================================================
; subroutine - wait for VRST to clear
Vsync0:
tpsu sense
bctr,eq Vsync0 ; wait for Sense bit to clear
retc,un
;=================================================================
; subroutine - wait for VRST to set
Vsync1:
tpsu sense ; wait for Sense bit to be set
bctr,lt Vsync1
retc,un